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Unlock Chip PIC18F6621 and readout the Archive from its memory, replicate the content from flash and eeprom memory to other blank Microcontrollers;

Unlock Chip PIC18F6621 Archive

The PIC18F6621 family also provides an enhanced range of program memory options and versatile analog features that make it ideal for complex, high performance applications.

Data RAM and Data EEPROM: The PIC18F6621 family also provides plenty of room for application data. The devices have 3840 bytes of data RAM, as well as 1024 bytes of data EEPROM for long term retention of nonvolatile data.

· Memory Endurance: The Enhanced Flash cells for both program memory and data EEPROM are rated to last for many thousands of erase/write cycles – up to 100,000 for program memory and 1,000,000 for EEPROM. Data retention without refresh is conservatively estimated to be greater than 40 years.

In the unlikely event that 64 Kbytes of program memory is inadequate for an application, the PIC18F6621 members of the family also implement an external memory interface. This allows the controller’s internal program counter to address a memory space of up to 2 MBytes, permitting a level of data access that few 8-bit devices can claim.

With the addition of new operating modes, the external memory interface offers many new options, including:

· Operating the microcontroller entirely from external memory

· Using combinations of on-chip and external memory, up to the 2-Mbyte limit

· Using external Flash memory for reprogrammable application code or large data tables

· Using external RAM devices for storing large amounts of variable data

Regardless of the memory size, all devices share the same rich set of peripherals, allowing for a smooth migration path as applications grow and evolve. The consistent pinout scheme used throughout the entire family also aids in migrating to the next larger device which can provide more support for IC Breaking.

This is true when moving between the 64-pin members, between the 80-pin members, or even Jumping From 64-pin To 80-pin Devices. 8621 family incorporates a range of serial communication peripherals, including 2 independent Enhanced USARTs and a Master SSP module capable of both SPI and I2C (Master and Slave) modes of operation.

Also, for PIC18F6525/6621/8525/8621 devices, one of the general purpose I/O ports can be reconfigured as an 8-bit Parallel Slave Port for direct processor to processor communications.

CCP Modules: All devices in the family incorporate two Capture/Compare/PWM (CCP) modules and three Enhanced CCP (ECCP) modules to maximize flexibility in control applications. Up to four different time bases may be used to perform several different operations at once.

Each of the three ECCPs offer up to four PWM outputs, allowing for a total of 12 PWMs. The ECCPs also offer many beneficial features, including polarity selection, Programmable Dead Time, Auto-Shutdown and Restart and Half-Bridge and Full-Bridge Output modes.