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Highlights

– High-Efficiency 32-Bit CPU ( TMS320C28x™)

– 60-MHz, 50-MHz, and 40-MHz Devices

– Single 3.3-V Supply

– Integrated Power-on and Brown-out Resets

– Two Internal Zero-pin Oscillators

– Up to 22 Multiplexed GPIO Pins

– Three 32-Bit CPU Timers

– On-Chip Flash, SARAM, OTP Memory

– Code-security Module

– Serial Port Peripherals (SCI/SPI/I2C)

– Enhanced Control Peripherals

· Low Device and System Cost:

– Single 3.3-V Supply

– No Power Sequencing Requirement

– Integrated Power-on and Brown-out Resets

– Small Packaging, as Low as 38-Pin Available

– Low Power

– No Analog Support Pins

· Clocking:

– Two Internal Zero-pin Oscillators

– On-Chip Crystal Oscillator/External Clock

Input

– Dynamic PLL Ratio Changes Supported

Enhanced Pulse Width Modulator (ePWM)

High-Resolution PWM (HRPWM)

– Watchdog Timer Module

– Missing Clock Detection Circuitry

· Enhanced Capture (eCAP)

· Analog-to-Digital Converter (ADC)

· On-Chip Temperature Sensor

· Comparator

– 38-Pin and 48-Pin Packages

· High-Efficiency 32-Bit CPU ( TMS320C28x™)

– 60 MHz (16.67-ns Cycle Time)

– 50 MHz (20-ns Cycle Time)

– 40 MHz (25-ns Cycle Time)

– 16 x 16 and 32 x 32 MAC Operations

– 16 x 16 Dual MAC

– Harvard Bus Architecture

– Atomic Operations

– Fast Interrupt Response and Processing

– Unified Memory Programming Model

– Code-Efficient (in C/C++ and Assembly)

· Endianness: Little Endian

· Up to 22 Individually Programmable,

Multiplexed GPIO Pins With Input Filtering

· Peripheral Interrupt Expansion (PIE) Block That

Supports All Peripheral Interrupts

· Three 32-Bit CPU Timers

· Independent 16-Bit Timer in Each ePWM

Module

· On-Chip Memory

– Flash, SARAM, OTP, Boot ROM Available

· 128-Bit Security Key/Lock

– Protects Secure Memory Blocks

– Prevents Firmware Reverse Engineering

· Serial Port Peripherals

– One SCI (UART) Module

– One SPI Module

– One Inter-Integrated-Circuit (I2C) Bus

· Advanced Emulation Features

– Analysis and Breakpoint Functions