FPGA & CPLD Difference

FPGA & CPLD Difference is mainly based on its structural characteristics and working principle. The usual classification method is:

cpld and fpga architecture

cpld and fpga architecture

Devices that form a logical behavior in a product term structure are called CPLDs, such as Lattice’s ispLSI series, Xilinx’s XC9500 series, Altera’s MAX7000S series, and Lattice (formerly Vantis) Mach series.
A device that constructs a logical behavior in a look-up table structure is called an FPGA, such as Xilinx’s SPARTAN series, Altera’s FLEX10K or ACEX1K series.

Although both FPGA and CPLD are programmable ASIC devices, there are many common features, but due to the differences in the structure of CPLD and FPGA, they have their own characteristics:

1st of all, CPLD is more suitable for completing various algorithms and combinational logic, and FPGA is more suitable for completing timing logic. In other words, FPGAs are more suitable for the rich structure of flip-flops, while CPLDs are more suitable for structures with limited triggers and rich product terms.

2nd is the continuous routing structure determines that its timing delay is uniform and predictable, and the segmented routing structure of FPGA determines the unpredictability of its delay.

3rd concerning about FPGAs have more flexibility than CPLDs in programming. The CPLD is programmed by modifying the logic functions with fixed interconnects. The FPGA is programmed primarily by changing the wiring of the internal wiring; the FPGA can be programmed under the logic gate, while the CPLD is programmed under the logic block.

4th refers to FPGA is more integrated than CPLD, with more complex wiring structure and logic implementation.

5th regarding to CPLD is more convenient than FPGA. The programming of CPLD adopts E2PROM or FAST-FLASH technology, which does not require an external memory chip and is easy to use and this features is provide more convenience for PLD IC Altera EPM7064LC44-15 reverse engineering. The programming information of the FPGA needs to be stored in the external memory, and the usage method is complicated.

6th goes about The CPLD is faster than the FPGA and has greater time predictability. This is because FPGAs are gate-level programming, and distributed interconnections between CLBs, while CPLDs are logic block-level programming, and the interconnections between their logic blocks are lumped.

7th is talking about programming mode, CPLD is mainly based on E2PROM or FLASH memory programming, the number of programming can reach 10,000 times. The advantage is that the programming information is not lost when the system is powered off. CPLD can be divided into two types: programming on the programmer and in system programming, both way can be carried by Retrieve IC Altera CPLD EPM7064STC44-10. Most of the FPGA is based on SRAM programming. The programming information is lost when the system is powered off. Each time the power is turned on, the programming data needs to be rewritten into the SRAM from outside the device. The advantage is that it can be programmed any number of times and can be programmed quickly at work for dynamic configuration at the board and system level.

8th is about CPLD has good confidentiality and poor FPGA confidentiality.

In the end, In general, the power consumption of CPLD is larger than that of FPGA, and the higher the integration, the more obvious.