Extract Chip PIC18F4431 Eeprom data and flash program, then copy the firmware into other blank Microcontroller which will provide the same functions as original PIC18F4431;
The PIC18F4431 devices include an internal oscillator block, which generates two different clock signals; either can be used as the system’s clock source. This can eliminate the need for external oscillator circuits on the OSC1 and/or OSC2 pins.
The main output (INTOSC) is an 8 MHz clock source, which can be used to directly drive the system clock. It also drives a postscaler, which can provide a range of clock frequencies from 125 kHz to 4 MHz. The INTOSC output is enabled when a system clock frequency from 125 kHz to 8 MHz is selected.
The other clock source is the internal RC oscillator (INTRC), which provides a 31 kHz output. The INTRC oscillator is enabled by selecting the internal oscillator block as the system clock source, or when any of the following are enabled:
· Power-up Timer
Fail-Safe Clock Monitor
Watchdog Timer
· Two-Speed Start-up
These features are discussed in greater detail in Section 22.0 “Special Features of the CPU”. The clock source frequency (INTOSC direct, INTRC direct or INTOSC postscaler) is selected by configuring the IRCF bits of the OSCCON register (Register 2-2).
INTIO MODES
Using the internal oscillator as the clock source can eliminate the need for up to two external oscillator pins, which can then be used for digital I/O. Two distinct configurations are available:
· In INTIO1 mode, the OSC2 pin outputs FOSC/4, while OSC1 functions as RA7 for digital input and output.
· In INTIO2 mode, OSC1 functions as RA7 and OSC2 functions as RA6, both for digital input and output.
The internal oscillator block is calibrated at the factory to produce an INTOSC output frequency of 8.0 MHz.
This changes the frequency of the INTRC source from its nominal 31.25 kHz. Peripherals and features that depend on the INTRC source will be affected by this shift in frequency if crack microcontroller pic16c716 hex.
The internal oscillator’s output has been calibrated at the factory, but can be adjusted in the user’s application. This is done by writing to the OSCTUNE register (Register 2-1). The tuning sensitivity is constant throughout the tuning range.
When the OSCTUNE register is modified, the INTOSC and INTRC frequencies will begin shifting to the new frequency. The INTRC clock will reach the new frequency within 8 clock cycles (approximately 8 * 32 µs = 256 µs). The INTOSC clock will stabilize within 1 ms. Code execution continues during this shift.
There is no indication that the shift has occurred. Operation of features that depend on the INTRC clock source frequency, such as the WDT, Fail-Safe Clock Monitor and peripherals, will also be affected by the change in frequency.
Like previous PIC18 devices, the PIC18F4431 devices include a feature that allows the system clock source to be switched from the main oscillator to an alternate low frequency clock source.
PIC18F4431 devices offer two alternate clock sources for the purpose of MCU reading. When enabled, these give additional options for switching to the various power-managed operating modes.
Essentially, there are three clock sources for these devices:
· Primary oscillators
· Secondary oscillators
· Internal oscillator block
The primary oscillators include the external crystal and resonator modes, the external RC modes, the external clock modes and the internal oscillator block. The particular mode is defined on POR by the contents of Configuration Register 1H. The details of these modes are covered earlier in this chapter.
The secondary oscillators are those external sources not connected to the OSC1 or OSC2 pins. These sources may continue to operate even after the controller is placed in a power-managed mode.
PIC18F2331/2431/4331/4431 devices offer only the Timer1 oscillator as a secondary oscillator. This oscillator, in all power-managed modes, is often the time base for functions such as a real-time clock.
Most often, a 32.768 kHz watch crystal is connected between the RC0/T1OSO and RC1/T1OSI pins. Like the LP mode oscillator circuit, loading capacitors are also connected from each pin to ground.
The Timer1 oscillator is discussed in greater detail in Section 12.2 “Timer1 Oscillator”.
In addition to being a primary clock source, the internal oscillator block is available as a power-managed mode clock source. The INTRC source is also used as the clock source for several special features, such as the WDT and Fail-Safe Clock Monitor.
The clock sources for the PIC18F2331/2431/4331/4431 devices are shown in Figure 2-8. See Section 12.0 “Timer1 Module” for further details of the Timer1 oscillator. See Section 22.1 “Configuration Bits” for Configuration register details.