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We can decipher Silicon Storage Technology SST89E58RD flexflash mcu ic, please view the chip for your reference:

8-bit 8051-Compatible Microcontroller (MCU)      · Ten Interrupt Sources at 4 Priority

with Embedded SuperFlash Memory

– Four External Interrupt Inputs

– Fully Software Compatible

· Programmable Watchdog Timer

– Development Toolset Compatible

· Programmable Counter Array (PCA)

– Pin-For-Pin Package Compatible

· Four 8-bit I/O Ports (32 I/O Pins)

· SST89E5xRD2 Operation

One 4-bit Port

– 0 to 40 MHz at 5V

· Second DPTR register

· SST89V5xRD2 Operation

· Low EMI Mode (Inhibit ALE)

– 0 to 33 MHz at 3V

· SPI Serial Interface

· 1 KByte Internal RAM

· Standard 12 Clocks per cycle, the

· Dual Block SuperFlash EEPROM

option to double the speed to 6

– 16/32 KByte primary block +

· TTL- and CMOS-Compatible Logic

8 KByte secondary block

· Brown-out Detection

(128-Byte sector size for both blocks)

· Low Power Modes

– Individual Block Security Lock with SoftLock

– Concurrent Operation during                    – Power-down Mode with External

In-Application Programming (IAP)                 – Idle Mode

– Memory Overlay for Interrupt Support during IAP

· Temperature Ranges:

· Support External Address Range up to 64

– Commercial (0°C to +70°C)

KByte of Program and Data Memory after Decipher Flexflash MCU IC Silicon Storage Technology SST89E58RD

– Industrial (-40°C to +85°C)

· Three High-Current Drive Ports (16 mA each)

· Packages Available

· Three 16-bit Timers/Counters

– 40-contact WQFN (Port 4 feature

· Full-Duplex, Enhanced UART                     – 44-lead PLCC

– 40-pin PDIP (Port 4 feature not

– Framing Error Detection

– 44-lead TQFP

– Automatic Address Recognition

· All non-Pb (lead-free) devices

 

 

PRODUCT DESCRIPTION

The SST89E5xRD2/RD and SST89V5xRD2/RD are   In addition to the 24/40 KByte of EEPROM

members of the FlashFlex family of 8-bit microcontroller   ory on-chip and 1024 x8 bits of on-chip

products designed and manufactured with SST’s patented   can address up to 64 KByte of external

and proprietary SuperFlash CMOS semiconductor pro–   and up to 64 KByte of external RAM.

cess technology. The split-gate cell design and thick-oxide

The flash memory blocks can be

tunneling injector offer significant cost and reliability bene-

dard 87C5x OTP EPROM programmer fitted

fits for SST’s customers. The devices use the 8051 instruc-

adapter and the firmware for SST’s devices.

tion set and are pin-for-pin compatible with standard 8051

on reset, the devices can be configured as

microcontroller devices.

an external host for source code storage or

The devices come with 24/40 KByte of on-chip flash   external host for an in-application

EEPROM program memory which is partitioned into 2   ation. The devices are designed to be

independent program memory blocks. The primary Block 0   tem and in-application on the printed

occupies 16/32 KByte of internal program memory space   maximum flexibility. The devices are

and the secondary Block 1 occupies 8 KByte of internal   an example of the bootstrap loader in the

program memory space.                           strating the initial user program code loading

user code updating via the IAP operation.

The 8-KByte secondary block can be mapped to the lowest

bootstrap loader is available for the user’s

location of the 16/32 KByte address space; it can also be

convenience only; SST does not guarantee

hidden from the program counter and used as an indepen-

or usefulness. Chip-Erase or Block-Erase

dent EEPROM-like data memory.

erase the pre-programmed sample code.