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All of the devices in the PIC18F8722 family incorporate a range of features that can significantly reduce power consumption during operation. Key items include:

· Alternate Run Modes: By clocking the controller from the Timer1 source or the internal oscillator block, power consumption during code execution can be significantly reduced.

· Multiple Idle Modes: The controller can also run with its CPU core disabled but the peripherals still active. In these states, power consumption can be reduced even further.

· On-the-fly Mode Switching: The power-managed modes are invoked by user code during operation, allowing the user to incorporate power-saving ideas into their application’s software design.

· Low Consumption in Key Modules: The power requirements for both Timer1 and the Watchdog Timer are minimized. See Section 28.0 “Electrical Characteristics” for values.

The PIC18F8722 family provides ample room for application code and includes members with 48, 64, 96 or 128 Kbytes of code space.

· Data RAM and Data EEPROM: The PIC18F8722 family also provides plenty of room for application data. The devices have 3936 bytes of data RAM, as well as 1024 bytes of data EEPROM, for long term retention of nonvolatile data.

· Memory Endurance: The Enhanced Flash cells for both program memory and data EEPROM are rated to last for many thousands of erase/write cycles, up to 100,000 for program memory and 1,000,000 for EEPROM. Data retention without refresh is conservatively estimated to be greater than 40 years.

All of the devices in the PIC18F6622 family offer ten different oscillator options, allowing users a wide range of choices in developing application hardware.

· Four Crystal modes, using crystals or ceramic resonators

· Two External Clock modes, offering the option of using two pins (oscillator input and a divide-by-4 clock output) or one pin (oscillator input, with the second pin reassigned as general I/O)

· Two External RC Oscillator modes with the same pin options as the External Clock modes

· An internal oscillator block which provides an 8 MHz clock and an INTRC source (approximately 31 kHz), as well as a range of 6 user selectable clock frequencies, between 125 kHz to 4 MHz, for a total of 8 clock frequencies. This option frees the two oscillator pins for use as additional general purpose I/O which can also be applied for the process of MCU Program reading.

· A Phase Lock Loop (PLL) frequency multiplier, available to both the high-speed crystal and internal oscillator modes, which allows clock speeds of up to 40 MHz. Used with the internal oscillator, the PLL gives users a complete selection of clock speeds, from 31 kHz to 32 MHz – all without using an external crystal or clock circuit.