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Following a power-on or external reset the P89LV51 will force the SWR and BSEL bits (FCF[1:0]) = 00. This causes the bootblock to be mapped into the lower 8 kB of code memory and the device will execute the ISP code in the boot block and attempt to autobaud to the host and provide a short cut for Clone Microcontroller P89LV51 Embedded Firmware.

Clone Microcontroller P89LV51 Embedded Firmware

If the autobaud is successful the device will remain in ISP mode. If, after approximately 400 ms, the autobaud is unsuccessful the boot block code will check to see if the SoftICE flag is set (from a previous programming operation). If the SoftICE flag is set the device will enter SoftICE mode. If the SoftICE flag is cleared, the bootcode will execute a software reset causing the device to execute the user code from block 0 starting at address 0000h.

Note that an external reset applied to the RST pin has the same effect as a power-on reset. A software reset is executed by changing the SWR bit (FCF.1) from ‘0’ to ‘1’. A software reset will reset the program counter to address 0000H and force both the SWR and BSEL bits (FCF[1:0]) =10.

This will result in the lower 8 kB of the user code memory being mapped into the user code memory space. Thus the user’s code will be executed starting at address 0000h when Extract MCU IC NXP P89LPC925FDH. A software reset will not change WDTC.2 or RAM data. Other SFRs will be set to their reset values. The device includes a brown-out detection circuit to protect the system from severe supply voltage fluctuations. The P89LV51’s brown-out detection threshold is 2.35 V.

When VDD drops below this voltage threshold, the brown-out detect triggers the circuit to generate a brown-out interrupt but the CPU still runs until the supplied voltage returns to the brown-out detection voltage VBOD. The default operation for a brown-out detection is to cause a processor reset after Clone Microcontroller P89LV51 Embedded Firmware.