This section describes the clock generator module (CGM) which are useful for Clone MC68HC908LJ12 Microcontroller Locked Heximal. The CGM generates the crystal clock signal, CGMXCLK, which operates at the frequency of the crystal.
The CGM also generates the base clock signal, CGMOUT, from which the system integration module (SIM) derives the system clocks. CGMOUT is based on either the crystal clock divided by two or the phase-locked loop (PLL) clock, CGMVCLK, divided by two.
The PLL is a frequency generator designed for use with 1MHz to 8MHz crystals or ceramic resonators when Remove MC68HC11K1 MCU Protection. The PLL can generate an 8MHz bus frequency without using a higher frequency crystal.
Features of the CGM include the following:
• Phase-locked loop with output frequency in integer multiples of the crystal reference
• Programmable hardware voltage-controlled oscillator (VCO) for low-jitter operation
• Automatic bandwidth control mode for low-jitter operation
• Automatic frequency lock detector
• CPU interrupt on entry or exit from locked condition to Extract IC
The CGM consists of three major sub-modules:
• Crystal oscillator circuit which generates the constant crystal frequency clock, CGMXCLK.
• Phase-locked loop (PLL) which generates the programmable VCO frequency clock CGMVCLK.
• Base clock selector circuit; this software-controlled circuit selects either CGMXCLK divided by two or the VCO clock CGMVCLK divided by two, as the base clock CGMOUT. The SIM derives the system clocks from CGMOUT.