The IRCF bits can be modified at any time regardless of which clock source is currently being used as the system clock in order to facilitate the process of Unlock Microchip PIC16LF913 Microprocessor Memory. The internal oscillator allows users to change the frequency during run time. This is achieved by modifying the IRCF bits in the OSCCON register.
The sequence of events that occur after the IRCF bits are modified is dependent upon the initial value of the IRCF bits before they are modified. If the INTRC (31.25 kHz, IRCF<2:0> = 000) is running and the IRCF bits are modified to any other value than ‘000’, a 4 ms (approx.) clock switch delay is turned on.
Code execution continues at a higher than expected frequency while the new frequency stabilizes. Time sensitive code should wait for the IOFS bit in the OSCCON register to become set before continuing or Break IC. This bit can be monitored to ensure that the frequency is stable before using the system clock in time critical applications.
If the IRCF bits are modified while the internal oscillator is running at any other frequency than INTRC (31.25 kHz, IRCF<2:0> ¹ 000), there is no need for a 4 ms (approx.) clock switch delay. The new INTOSC frequency will be stable immediately after the eight falling edges. The IOFS bit will remain set after clock switching occurs.
Caution must be taken when modifying the IRCF bits using BCF or BSF instructions when Unlock Microchip PIC16LF913 Microprocessor Memory. It is possible to modify the IRCF bits to a frequency that may be out of the VDD specification range; for example, VDD = 2.0V and IRCF = 111 (8 MHz).
Following are three different sequences for switching the internal RC oscillator frequency.
Clock before switch: 31.25 kHz (IRCF<2:0> = 000)
IRCF bits are modified to an INTOSC/INTOSC postscaler frequency.
The clock switching circuitry waits for a falling edge of the current clock, at which point CLKO is held low.
The clock switching circuitry then waits for eight falling edges of requested clock, after which it switches CLKO to this new clock source in the process of Secured MCU PIC18F2525 Heximal cracking.
The IOFS bit is clear to indicate that the clock is unstable and a 4 ms (approx.) delay is started. Time dependent code should wait for IOFS to become set.
Switchover is complete.