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Read out the firmware in the format of binary or heximal from P87LPC760 through Unlock Philip Microcontroller P87LPC760 Flash Memory, external interrupt input can help us reset its tamper resistance mechanism and make it become feasible:

The P87LPC760 has one individual interrupt input as well as the Keyboard Interrupt function. The latter is described separately in this section. The interrupt input is identical to those present on the standard 80C51 microcontroller.

The external source can be programmed to be level-activated or transition-activated by setting or clearing bit IT0 in Register TCON. If IT0 = 0, external interrupt 0 is triggered by a detected low at the INT0 pin. If IT0 = 1, external interrupt 0 is edge triggered. In this mode if successive samples of the INT0 pin show a high in one cycle and a low in the next cycle, interrupt request flag IE0 in TCON is set, causing an interrupt request when recover MCU.

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Since the external interrupt pin is sampled once each machine cycle, an input high or low should hold for at least 6 CPU Clocks to ensure proper sampling. If the external interrupt is transition-activated, the external source has to hold the request pin high for at least one machine cycle, and then hold it low for at least one machine cycle. This is to ensure that the transition is detected and that interrupt request flag IE0 is set to Recovery Microcontroller IC NXP LPC2119FBD64.

IE0 is automatically cleared by the CPU when the service routine is called. If the external interrupt is level-activated, the external source must hold the request active until the requested interrupt is actually generated. If the external interrupt is still asserted when the interrupt service routine is completed another interrupt will be generated.

It is not necessary to clear the interrupt flag IE0 when the interrupt is level sensitive, it simply tracks the input pin level. If the external interrupt is enabled when the P87LPC760 is put into Power Down or Idle mode, the interrupt will cause the processor to wake up and resume operation. Refer to the section on Power Reduction Modes for details.