We can Pull Microprocessor IC Microchip PIC12LF1552 firmware out from its memory, please view the chip features for your reference:
High-Performance RISC CPU:
Low-Power Features:
C Compiler Optimized Architecture
Only 49 Instructions
2K Words Linear Program Memory Addressing
256 bytes Linear Data Memory Addressing
Operating Speed:
· Standby Current:
– 20 nA @ 1.8V, typical
· Watchdog Timer Current:
– 200 nA @ 1.8V, typical
· Operating Current:
– DC – 32 MHz clock input
– DC – 125 ns instruction cycle
· Interrupt Capability with Automatic Context
Saving
· 16-Level Deep Hardware Stack with Optional Overflow/Underflow Reset
· Direct, Indirect and Relative Addressing modes:
– Two full 16-bit File Select Registers (FSRs)
– FSRs can read program and data memory
Flexible Oscillator Structure:
· 16 MHz Internal Oscillator Block:
– Factory calibrated to ±1%, typical
– Software selectable frequency range from 32 MHz to 31 kHz
· 4x Phase-Lock Loop (PLL), usable with 16 MHz internal oscillator
– Allows 32 MHz software selectable clock frequency
· 31 kHz Low-Power Internal Oscillator
· Three External Clock modes up to 20 MHz
Special Microcontroller Features:
· Operating Voltage Range:
– 1.8V to 3.6V
· Self-Programmable under Software Control
· Power-on Reset (POR)
· Power-up Timer (PWRT)
· Programmable Low-Power Brown-Out Reset (LPBOR)
· Extended Watchdog Timer (WDT):
– Programmable period from 1 ms to 256s
· Programmable Code Protection
· In-Circuit Serial Programming™ (ICSP™) via Two Pins
· Enhanced Low-Voltage Programming (LVP)
· Power-Saving Sleep mode:
– Low-Power Sleep mode
– Low-Power BOR (LPBOR)
· Integrated Temperature Indicator
· 128 Bytes High-Endurance Flash:
– 100,000 write Flash endurance (minimum)
– 30 mA/MHz @ 1.8V, typical
Peripheral Features:
· Analog-to-Digital Converter (ADC):
– 10-bit resolution
– 5 external channels
– 2 internal channels:
– Fixed Voltage Reference
– Temperature Indicator channel
– Auto acquisition capability
– Conversion available during Sleep
– Special Event Triggers
– Conversion available during Sleep
· Hardware Capacitive Voltage Divider (CVD)
– Double sample conversions
– Two result registers
– Inverted acquisition
– 7-bit pre-charge timer
– 7-bit acquisition timer
– Two guard ring output drives
– Adjustable sample and hold capacitor array
· Voltage Reference module:
– Fixed Voltage Reference (FVR) with 1.024V and 2.048V output levels
· 6 I/O Pins (1 Input-only Pin):
– High current sink/source 25 mA/25 mA
– Individually programmable weak pull-ups
– Individually programmable interrupt-on-change (IOC) pins
· Timer0: 8-Bit Timer/Counter with 8-Bit Programmable Prescaler
· Master Synchronous Serial Port (MSSP) with SPI and I2CTM with:
– 7-bit address masking
– SMBus/PMBusTM compatibility