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Discover AVR MCU Atmel ATmega88V
We can Discover AVR MCU Atmel ATmega88V, please view the IC chip features for your reference:
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability.
As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Depending on the clock selection fuse settings, PB6 can be used as input to the inverting Oscillator amplifier and input to the internal clock operating circuit. Depending on the clock selection fuse settings, PB7 can be used as output from the inverting Oscillator amplifier.
If the Internal Calibrated RC Oscillator is used as chip clock source, PB7..6 is used as TOSC2..1 input for the Asynchronous Timer/Counter2 if the AS2 bit in ASSR is set when pull program from mcu.
The various special features of Port B are elaborated in “Alternate Functions of Port B” on page 69 and “System Clock and Clock Options” on page 24. Port C is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit).
The PC5..0 output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated.
The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. If the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin.
Discover AVR MCU Atmel ATmega88V
Note that the electrical characteristics of PC6 differ from those of the other pins of Port C if read out heximal from freescale microprocessor.
If the RSTDISBL Fuse is unprogrammed, PC6 is used as a Reset input. A low level on this pin for longer than the minimum pulse length will generate a Reset, even if the clock is not running.
The minimum pulse length is given in Table 20 on page 41. Shorter pulses are not guaranteed to generate a Reset. The various special features of Port C are elaborated in “Alternate Functions of Port C” on page 73. Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit) after Discover AVR MCU Atmel ATmega88V.
The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated.
The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running before decrypt firmware of freescale microprocessor.
The various special features of Port D are elaborated in “Alternate Functions of Port D” on page 75. AVCC is the supply voltage pin for the A/D Converter, PC3..0, and ADC7..6. It should be externally connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to VCC through a low-pass filter.
Note that PC6..4 use digital supply voltage, VCC. AREF is the analog reference pin for the A/D Converter. The AVR core combines a rich instruction set with 32 general purpose working registers.
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers after pull the code off freescale microcontroller.
The ATmega88V provides the following features: 4K/8K/16K bytes of In-System Programmable Flash with Read-While-Write capabilities, 256/512/512 bytes EEPROM, 512/1K/1K bytes SRAM, 23 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, a byte-oriented 2-wire Serial Interface, an SPI serial port, a 6-channel 10-bit ADC (8 channels in TQFP and MLF packages), a programmable Watchdog Timer with internal Oscillator, and five software selectable power saving modes.
The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, USART, 2-wire Serial Interface, SPI port, and interrupt system to continue functioning.
The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping.
The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low power consumption.